Motorola MXP Packet Processor Resource Board Simulator with C-5
Motorola’s PPRB is a resource for the MXP platform architecture
that is central for the application of the MXP in the bearer plane of
the edge market. The PPRB Simulation Environment enables simulation of
PPRB host and data plane (C-5) traffic movement and provides unified debugging
of control and data path applications running simultaneously. The simulation
environment (Figure-1) is based on x86 Linux and Windows
NT/2K systems connected in a LAN.
Figure-1
Features:
• PCI path simulation between host
and C-5 network processor
• DCP shell support on host
• HT traffic simulation, using pattern
files
• Unified debug interface for control
and data-plane applications
Benefits:
• Helps in performance analysis
and proof-of-concept prototyping of applications, months, before actual
hardware is  available
• Enables development of applications
for PPRB boards
• Reduces need for multiple PPRB
hardware platforms for parallel development
• Support for Motorola C-port Processor
family including: C-5, C-5e, C-3e, Q-5, M-5
Hardware:
• 1 Linux system with 2 Ethernet
adaptors
• 1 Windows NT/2000 system
Software:
• PPRB Simulator (download
evaluation version)
• Pre-installed C-port’s CST
2.0 or CST 2.1 toolkit on Windows NT/2000 system
About Motorola MCG
Motorola Computer Group is the leading supplier of chassis’s, boards
and systems to the embedded systems community.
Avnisoft, in partnership with MCG, has produced a Packet Processor Resource
Board Simulator for MCG’s new Multi-Service Packet Transport Platform
(MXP). The MXP is a 21-slot CompactPCI rackmount system that can support
multiple protocols, such as IP, ATM and Frame Relay. It features a non-shared,
multi-gigabit fully meshed packet transport backplane enabling a high-speed
data environment that can scale tto more than 700Gb/s.
Motorola and Anvisoft both market the PPRB Simulator, while Avnisoft is
responsible for development, licensing and support.
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